1. Field of the Invention
The present invention relates to a method of forming a multilayer interconnection structure, a method of manufacturing circuit boards, and a method of manufacturing devices.
2. Description of the Related Art
Recently, in electronic devices such as semiconductor devices and the like, wiring has been multilayered in order to realize a high degree of integration. Moreover, in a semiconductor device having a multilayered interconnection structure, in the case of electrically connecting upper and lower wiring patterns arranged via an interlayer insulating layer, contact holes are formed in the interlayer insulating film such that connections can be made via the contact holes. For a method of forming such a multilayer interconnection structure, the following method is generally known.
First, a conductive material such as a metal is formed as a film on a substrate, and is etched in order to form a lower wiring layer. Next, an interlayer insulating layer is formed on the lower wiring film, and predetermined apertures (contact holes) are formed in the interlayer insulating layer using a photolithographic method. Furthermore, conductive material serving as contact plugs is applied over the whole surface of the interlayer insulating layer so as to fill up the contact holes, and patterned using a photolithographic method to form contact plugs. Then, conductive wiring material for an upper layer is formed as a film so as to be connected to the contact plugs, and by patterning this using a photolithographic method, an upper wiring layer is formed (for example, refer to Japanese Unexamined Patent Application, First Publication No. Hei 4-291240).
In the above-described Japanese Patent Publication, when contact plugs and wiring layers are formed, a photolithographic method is used. That is, a process is performed in which, after contact holes are formed, conductive material is deposited, resist is applied onto the conductive material, exposed and developed, and after the conductive material is etched with the resist used as a mask, the resist is removed. In this case, since the process is such that the conductive material is deposited firstly over the whole surface, and etched afterwards, leaving a predetermined pattern, the efficiency of material usage is extremely low. Furthermore, the number of processes is high, which can lead to an increase in the manufacturing cost.